secondary cache
DYNAMICALLY MANAGED LOCAL MEMORY THAT MIRRORS MAIN MEMORY IN A MICROPROCESSOR TO REDUCE THE COST OF ACCESS
Level 1 cache; Level 2 cache; Cache line; CPU memory cache; Trace Caches; Trace caches; Cache block; Cache-line; L2 cache; L3 cache; L1 cache; CPU caches; CPU Cache; Data cache; Internal cache; Data Cache; First-level cache; L2-Cache; L1-Cache; Second-level cache; Secondary cache; Tag RAM; Direct mapped; Cpu cache; Instruction cache; L2 Cache; Cache flush; Motherboard cache; Discrete L2 cache; Level 3 cache; VIVT; VIPT; I cache; Processor cache; Internal and external cache; Multi-ported Cache; Smart Cache; CPU cache line; Copy-back; L4 cache; Micro-operation cache; Uop cache; Last level cache; Last Level Cache; Cache eviction; Exclusive CPU cache; Inclusive CPU cache; Exclusive cache; Inclusive cache; Multi-level cache; Multilevel cache; On-chip cache; Cache lines; Shared cache; Non-blocking cache; Branch target cache; Branch target instruction cache; SmartCache; Smart cache; L1d
<
memory management> (Or "second level
cache", "level two
cache", "L2
cache") A larger, slower
cache between the
primary cache and main memory. Whereas the
primary cache
is often on the same
integrated circuit as the {central
processing unit} (CPU), a secondary
cache is usually external.
(1997-06-25)